18.6 Cache Test Mode Protocol

Auto-Increment Write Protocol


A cache test mode auto-increment write operation writes a selected RAM array. The write address is obtained by incrementing the previous write address, and the write way is obtained from the previous write way.

If an overflow occurs when incrementing the previous write address, the address wraps to 0, and the way is toggled.

The write data is identical to the previous write data.

For proper results, an auto-increment write must always be proceeded by a normal or auto-increment write.

The external agent issues an auto-increment write command by:

Auto-increment writes have a repeat rate of one PClk cycle.

Figure 18-4 depicts three cache test mode auto-increment writes.



Figure 18-4 Cache Test Mode Auto-Increment Write Protocol




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


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